News and Events
Excellicon’s ConTree enables designer to plan for Clock Tree structures and guide their CTS engine for better results
June 20, 2018 – Laguna Hills, CA
Excellicon Inc. an innovative provider of end-to-end timing constraints products announced the addition of ConTree product as an add-on option to their existing ConCert product. ConTree provides analysis capabilities prior to Clock Tree Synthesis. Once Clock Tree is synthesized, ConTree is able to perform full verification of Clock Tree. The users of Excellicon products can now very simply and automatically.
In preparation for Clock Tree synthesis often the designer need to gain understanding of the skew groups, Macros in the design, existence of any mode conflicts, detection of any invalid or non-propagating or even redundant logic in the clock paths, as well as understating jitter in duty cycle.
Once the clock tree is synthesized the validation is as crucial. ConTree can perform deep analysis of all cells, and distribution of clock tree across the power domains, and any associated exceptions. The product also provides a rich capabilities for reporting, debugging and visualization of results.
Himanshu Bhatnagar, CEO of Excellicon said “ConTree does something that no other tool can, by quantifying the quality of the clock tree as synthesized by CTS tools. The designer gains deep understanding and insight using ConTree as opposed to accepting the CTS tool result and being at risk of discovering design issues later.”
ConTree provides another addition to Excellicon products which ensures designers can cover all aspects of timing closure process from early stages of design to final tapeout.
About Excellicon
Excellicon is an innovative provider of end-to-end Timing Constraints Analysis and Debugging solutions for the automation of constraints authoring, completion, and validation from RTL to GDS with innovative analysis and debugging infrastructures. Excellicon products Constraints Manager, Constraints CerTifier, Exception-ToolBox (ET), Budgeting-Tool Box (BT), Equivalence-Checker (EQ), and ConTree address the needs of designers at every stage of SOC design and implementation in a unified environment. – Timing Closure; Done Once! Done Right!
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